Talking about the difference between analog and digital wiring strategies

- Jan 07, 2020-

Talking about the difference between analog and digital wiring strategies

After the digital and analog ranges are determined, careful wiring is critical to a successful PCB. Wiring strategies are usually introduced as a rule of thumb because it is difficult to test the ultimate success of a product in a lab environment. Therefore, despite the similarities in the layout strategies of digital and analog circuits, the differences in layout strategies must be recognized and taken seriously.


 Analysis of analog and digital wiring strategies


Bypass or decoupling capacitor


 When wiring, both analog and digital devices need these types of capacitors, and a capacitor needs to be connected near its power supply pin. This capacitor value is usually 0.1uF. Another type of capacitor is needed on the power supply side of the system. Usually this capacitor value is about 10uF.


 The location of these capacitors is shown in Figure 1. Capacitance ranges from 1/10 to 10 times the recommended value. But the pins must be short and as close as possible to the device (for 0.1uF capacitor) or power supply (for 10uF capacitor).


 Adding bypass or decoupling capacitors on the circuit board and the location of these capacitors on the board are common sense for digital and analog design. Interestingly, the reasons are different. In analog wiring design, bypass capacitors are usually used to bypass high-frequency signals on the power supply. If no bypass capacitors are added, these high-frequency signals may enter sensitive analog chips through the power pins. In general, these high-frequency signals exceed the ability of analog devices to suppress high-frequency signals. If bypass capacitors are not used in the analog circuit, noise may be introduced in the signal path, and even more serious conditions may even cause vibration.



Figure 1 In analog and digital PCB designs, bypass or decoupling capacitors (0.1uF) should be placed as close to the device as possible. The power supply decoupling capacitor (10uF) should be placed at the power cord entrance of the circuit board. In all cases, the pins of these capacitors should be short


Figure 2 On this circuit board, different routes are used to route power and ground wires. Due to this improper cooperation, the electronic components and circuits of the circuit board are more likely to be affected by electromagnetic interference.



Figure 3 In this single panel, the power and ground wires to the devices on the board are close to each other. The matching of the power and ground wires in this circuit board is more appropriate than in Figure 2. Reduced the possibility of electromagnetic components (EMI) of electronic components and circuits in circuit boards by 679 / 12.8 times or about 54 times



For digital devices such as controllers and processors, decoupling capacitors are also required, but for different reasons. One function of these capacitors is to serve as a "mini" charge bank. In digital circuits, a large current is usually required to perform the switching of the gate states. Since switching transient currents are generated on the chip when switching and flow through the circuit board, it is advantageous to have additional "backup" charges. If there is not enough charge during the switching operation, the power supply voltage will change greatly. Too large a change in voltage will cause the digital signal level to enter an indeterminate state and will likely cause the state machine in a digital device to malfunction. The switching current flowing through the circuit board traces will cause the voltage to change, and there is parasitic inductance in the circuit board traces. The voltage change can be calculated using the following formula: V = LdI / dt


Among them, V = change of voltage; L = inductance of circuit board trace; dI = change of current flowing through trace; dt = time of current change.


Therefore, it is good practice to apply a bypass (or decoupling) capacitor at the power supply or at the power pin of the active device for a number of reasons.


Put the power and ground wires together


 The position of the power line and the ground line is well matched to reduce the possibility of electromagnetic interference. If the power and ground wires are not matched properly, a system loop will be designed and noise will likely be generated. An example of a PCB design with improperly matched power and ground wires is shown in Figure 2.


The loop area designed on this circuit board is 697cm2. By adopting the method shown in FIG. 3, the possibility that the radiated noise on the circuit board or outside the circuit board induces voltage in the loop can be greatly reduced.


Differences in analog and digital wiring strategies


The ground plane is a problem

 The basic knowledge of circuit board wiring applies to both analog and digital circuits. A basic rule of thumb is to use an uninterrupted ground plane. This common sense reduces the dI / dt (current change over time) effect in digital circuits. This effect changes the potential of the ground and causes noise to enter the analog circuit. The wiring techniques for digital and analog circuits are basically the same, with one exception. For analog circuits, there is another point to note, that is, keep the digital signal lines and the loops in the ground plane as far away as possible from the analog circuits. This can be achieved by separately connecting the analog ground plane to the system ground connection end, or placing the analog circuit at the far end of the circuit board, which is the end of the line. This is done to keep the signal path from external interference to a minimum. This is not necessary for digital circuits, which can tolerate a large amount of noise on the ground plane without problems.


Figure 4 (left) isolates the digital switching action from the analog circuit and separates the digital and analog parts of the circuit. (Right) Separate the high and low frequencies as much as possible, and the high frequency components should be close to the connector of the circuit board



Figure 5 It is easy to form parasitic capacitance by laying two close traces on the PCB. Due to the presence of this capacitor, a rapid voltage change on one trace can generate a current signal on the other trace.



Figure 6 If you do not pay attention to the placement of the traces, the traces in the PCB may produce line inductance and mutual inductance. This parasitic inductance is very detrimental to the operation of circuits containing digital switching circuits



Component location


As mentioned above, in each PCB design, the noisy part and the "quiet" part (non-noise part) of the circuit should be separated. In general, digital circuits are "rich" in noise and are not sensitive to noise (because digital circuits have large voltage noise margins); in contrast, analog circuits have much smaller voltage noise margins. Of the two, analog circuits are the most sensitive to switching noise. In the wiring of mixed-signal systems, these two circuits are separated, as shown in Figure 4.


Parasitic components generated by PCB design


In the PCB design, it is easy to form two basic parasitic components that may cause problems: parasitic capacitance and parasitic inductance. When designing a circuit board, placing two traces close to each other creates parasitic capacitance. You can do this: Place one trace on top of another on two different levels; or place one trace next to another on the same level, as shown in Figure 5. In these two trace configurations, the change in voltage (dV / dt) on one trace over time may generate current on the other trace. If the other trace is high impedance, the current generated by the electric field is converted into a voltage.


Fast voltage transients most often occur on the digital side of analog signal designs. If traces with fast voltage transients are close to high-impedance analog traces, this error will seriously affect the accuracy of the analog circuits. In this environment, analog circuits have two disadvantages: their noise margin is much lower than digital circuits; high impedance traces are more common.


Using one of the two techniques described below can reduce this phenomenon. The most commonly used technique is to change the size between traces based on the equation of capacitance. The most effective size to change is the distance between the two traces. It should be noted that the variable d is in the denominator of the capacitance equation. As d increases, the capacitive reactance decreases. Another variable that can be changed is the length of the two traces. In this case, the length L is reduced, and the capacitive reactance between the two traces is also reduced.


Another technique is to lay a ground wire between the two traces. The ground wire is low impedance, and adding such another trace will weaken the interference-causing electric field, as shown in Figure 5.


The principle of parasitic inductance in a circuit board is similar to that of parasitic capacitance. It is also to run two traces, and place one trace above the other on two different levels; or place one trace next to the other on the same level, as shown in Figure 6. In these two trace configurations, the change of current on one trace with time (dI / dt), due to the inductance of this trace, voltage will be generated on the same trace; and due to the existence of mutual inductance, A proportional current is generated on the other trace. If the voltage change on the first trace is large enough, interference may reduce the voltage tolerance of the digital circuit and cause errors. This phenomenon does not occur only in digital circuits, but this phenomenon is more common in digital circuits because of the large instantaneous switching currents in digital circuits.


 In order to eliminate potential noise from electromagnetic interference sources, it is best to separate "quiet" analog lines from noise I / O ports. To try to achieve a low-impedance power and ground network, the inductive reactance of digital circuit wires should be minimized, and the capacitive coupling of analog circuits should be minimized.

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