Microvia Voiding And Its Effect On
Microvia voiding and its effect on thermomechanical reliability
One challenge for high density interconnect board development, is to fabricate reliable microvias, especially for stacked microvias, without resulting in incomplete filling, dimples, or voids in the copper plating process. The authors of have been investigating the risk of microvias in terms of voids and other defects using both experimental testing and finite element analysis. They found that incomplete copper filling increases the stress levels in microvias and hence decreases microvia fatigue life. As for voids, different voiding conditions, such as different void sizes, shapes, and locations result in different effects on microvia reliability. Small voids of a spherical shape lightly increase the microvia fatigue life, but extreme voiding conditions greatly reduce the duration of microvias. This team is currently developing a qualification method that the electronics industry can use to assess the risks with using an HDI circuit board that employs microvias.